Today, feature sizes of conventional CMOS devices in production are at 65nm. This number is expected to halve over the next 5 years, with nano-technologies of even smaller dimensions on the horizon. The high levels of integration and system complexity enabled by such high density processes are creating enormous challenges during chip and system design. To reduce the unacceptably large computational cost of simulating or verifying large mixed-signal systems, simplified behavioral models (or macro-models) to replace large and complex SPICE-level circuits are being increasingly used. Today, behavioral models are being used in more and more applications as they evolve into accurate, all-purpose replacements for circuits and subsystems. The level of reliance on predictions made using behavioral models is also increasing markedly. Although behavioral models have always been part of analog design, the process of generating and using them is gradually changing into a structured, scientific discipline. There is broad consensus that effective behavioral modeling will constitute a central and critical component of all future design processes.

The aim of BMAS is to encourage and facilitate the growth of modern behavioral modeling and simulation by providing a forum for presenting research results and sharing experiences relating to all its aspects. Several communities intersect at BMAS: not only behavioral model and language developers, but also analog, mixed-signal and high-speed-digital circuit and system designers, developers of computer-aided design tools at all levels of design, the semiconductor device compact modeling community, and practitioners of simulation, modeling and verification in non-traditional EE areas such as MEMS, opto-electronics and biological systems. This year, BMAS is co-located with the Custom Integrated Circuits Conference (CICC) to further facilitate participation of the circuit and system design communities. The workshop makes use of presentations, panel discussions, embedded tutorials, and poster sessions to present the latest advances and trends. It particularly emphasizes the use of simulation and modeling techniques that cover several levels of abstraction (i.e. circuit to system), address multi-disciplinary problems (mixed-signal or mixed-technology), or address emerging areas of interest (i.e. RF techniques, biological systems).

Semiconductor Device Compact Modeling

Representative areas include:
Compact device modeling lanuages and compilers
Standard and new compact device models implemented in Verilog-A and VHDL-AMS
Compact device models for emerging technologies and topical issues (nano-devices, distributed thermal effect, leakaging issues, manufacturability, radiation effects, etc).

Mixed-Technology Topics

Topics focusing on contributions to the research, development and applications involving systems that are part or wholly non-electrical by nature. Representative areas include:
Mixed-technology modeling (electro-mechanical, thermal-electronic, etc.)
Thermal modeling
Optical modeling
Hydraulics modeling
Mechanical modeling
MEMS modeling
Biological and biochemical modeling
Mixed-level simulation (e.g., mixed finite-element/continuous-time)
Mixed-domain modeling (frequency-domain, time-domain)
Case studies in telecommunication, automotive electronics, etc.
Power electronic modeling
Full-system verification
Stress modeling
Failure effects modeling

Language and Tool Topics

Topics focusing on contributions to the research and development of hardware description languages (HDLs) and modeling and simulation tools and algorithms that enable the simulation of the previous two general tracks. Representative areas include:
VHDL-AMS, Verilog-A, Verilog A/MS
Language requirements, analysis and validation
Language design issues and language-theoretic foundations
Extensions to standard modeling languages for specialized applications (semiconductors, MEMS, RF, etc.)
GUIs for simplifying use of languages
Compilation techniques for simulation optimization
Distributed and parallel mixed-signal simulation
Frequency domain modeling and simulation
Automated model extraction and reduction
Formal description languages for electronic circuits and systems
Unified solutions for simulating mixed domains
Tools providing interoperability of models and languages

The technical program committee invites original submissions in these areas. The deadline for submission is Monday, June 30, 2008. Submitting full papers is strongly encouraged, abstract-only submissions will be considered but will be at a disadvantage. Submissions must be made electronically to www.bmas-conf.org. The paper can be up to 6 pages in length. A PDF submission example gives details on the format for preparing your paper (Framemaker template).

Papers will be selected through an open peer-review process supervised by the Technical Program Committee. Papers selected for oral and poster presentation will be in the conference proceedings to be published by the IEEE. Authors will be notified of decisions on their papers by July 28, 2008. A camera-ready version of a full proceedings version of accepted papers will be required by August 11, 2008.

Proceedings of the workshop will be published by the IEEE. An IEEE copyright form must accompany the paper in order for it to be published. Copyright forms will be needed if the paper is accepted.

All presentation material must be in the form of a PowerPoint or PDF presentation. A projector connected to a Windows laptop will be available for displaying the material. The presentation material should be brought to the conference and can be loaded on the laptop using a CD reader or a USB port.

Poster presenters should also bring electronic copies of their presentation materials and load them onto the conference laptop.

All papers and presentations will be added to the BMAS website after the conference.

All presentors must register for the conference by the advance registration date. Failure to do so will cause your presentation to be removed from the program and your paper to be removed from the proceedings.

Paper Submission Deadline
June 30, 2008

Notification of Acceptance
July 28, 2008

Final Material Submission Deadline
August 11, 2008

Presentor Registration Deadline
August 11, 2008